1. Field of the Invention
The invention generally relates to deposition of a metal layer on a substrate. More particularly, the invention relates to electrical biasing between an anode and a substrate to enhance deposition of a metal layer on the substrate.
2. Description of the Background Art
Sub-quarter micron, multi-level metallization is an important process for the next generation of ultra large scale integration (ULSI). Reliable formation of interconnect features permits increased circuit density, improves acceptance of ULSI, and improves quality of individual processed substrates. As circuit densities have increased, the widths of vias, contacts and other features, as well as the width of the dielectric materials between the features, have decreased. However, the heights of the dielectric layers have not changed substantially over the same time frame. Therefore, the aspect ratios (i.e., the features height or depth divided by their width) of the minimum-width features have increased in recent years. Providing processing regimes to form these small features having an increased aspect ratio poses a challenge to traditional deposition techniques and processes. As a result, a great amount of ongoing effort is directed at the formation of void-free, nanometer-sized uniform ULSI features.
Electroplating, previously limited in integrated circuit design to the fabrication of lines on circuit boards, is now used to deposit metals, such as copper, to form interconnect features such as vias, trenches, and contacts. Metal electroplating, in general, can be achieved by a variety of techniques. A feature-fill process including electroplating involves initially depositing a diffusion barrier layer over the feature surfaces. Next, a seed layer 15 is deposited by a process such as physical vapor deposition (PVD) or chemical vapor deposition (CVD) on the feature surface. A metal layer is then deposited over the seed layer 15 by electroplating. Finally, the deposited layers can be planarized by another process, e.g., chemical mechanical polishing (CMP), to define a conductive interconnect feature.
Deposition of a metal layer by electroplating is accomplished by providing an electric current between the seed layer deposited on the substrate (cathode) and a separate anode. Both the anode and the cathode are immersed in an electrolyte solution containing the metal to be deposited. The chemical reaction between the anode and the electrolyte solution provides more metal ions into the electrolyte solution. A suitable electric voltage applied between the anode and the seed layer 15 on the substrate attracts the metal ions to the seed layer.
FIG. 2A shows a portion of a substrate 200 having a feature 202 formed therein. The feature 202 includes walls 206 and bottom 208. Outside of the feature is a horizontal surface 204. A throat 212 defines the opening of the feature 202 is formed between walls 206, on the opposed side of each features 202. The seed layer 15 is applied over the horizontal surface 204, the walls 206, and the bottom 208. Metal ions deposit on the seed layer 15. Non-uniformity in the deposited thickness of the metal layer on the walls 206 and the bottom 208 of the feature, and the horizontal surface 204 results because of minute sizes of the features, the different angular orientations of the different feature surfaces, and the increased charge density at the edges and corners of the features. Metal ions suspended in the electrolyte solution have difficulty entering the small feature due to the feature's small throat. The features have especially small entrance dimensions when the throat is closing off. Therefore, the concentrations of metal ions in the electrolyte solution within the features are lower than the concentration of metal ions in the electrolyte solution outside of the feature. This lower concentration of metal ions in the feature results in a lower deposition rate in the features.
A high deposition rate of the metal on the substrate during electroplating results in the substrates being plated faster, and thus processing the substrates at a rate that achieves higher throughput. When the seed layer 15 on the substrate is immersed in the electrolyte solution, a closed circuit is formed between the anode and the cathode. The deposition rate on a seed layer is a function of the bias current being applied from the anode to the seed layer 15. However, if too much electrical current is initially applied from the anode to the cathode, the deposited metal most rapidly forms at the throat of the feature. The deposited metal will likely close the throat of the feature before the inside of the feature is completely filled by deposited metal. The difficulty in depositing metal in the features before the throat is closed results from a difficulty in enhancing the concentration of metal ions in the electrolyte solution contained in the features of the substrate. Therefore, the initial bias deposition voltage applied to the seed layer 15 in electroplating systems is often limited to a value (approximately 0.8 volts) to provide relatively slow metal deposition that is sufficient to overcome the electrolyte solution etching away the seed layer 15 while not closing off the throat 212 of the feature. The level of the current/voltage between the anode and the plating surface controls the deposition rate in the horizontal surfaces 204 above and outside of the feature, as well as the walls 206 of the feature and the bottoms 208 of the feature.
Care must be provided to limit closing of the throat 212 of the features during deposition as shown in FIG. 2B. If the throat 212 of the feature closes before the interior of the feature is filled with the deposited material, a void 214 is created within the feature 202. The integrity of an electronic device having voids formed therein is compromised.
Therefore, there is a need for an electroplating process that fills the feature before the bulk deposition of metal on the horizontal surface. Such an electroplating process would improve the deposition of metal ions within the feature during the initial metal ion deposition processes.